Suboptimal greedy power allocation schemes for discrete bit loading

In this paper we consider low cost discrete bit loading based on greedy power allocation (GPA) under the constraints of total transmit power budget, target BER, and maximum permissible QAM modulation order. Compared to the standard GPA, which is optimal in terms of maximising the data throughput, three suboptimal schemes are proposed, which perform GPA on subsets of subchannels only. These subsets are created by considering the minimum SNR boundaries of QAM levels for a given target BER. We demonstrate how these schemes can significantly reduce the computational complexity required for power allocation, particularly in the case of a large number of subchannels. Two of the proposed algorithms can achieve near optimal performance including a transfer of residual power between subsets at the expense of a very small extra cost. By simulations, we show that the two near optimal schemes, while greatly reducing complexity, perform best in two separate and distinct SNR regions

Suboptimal greedy power allocation schemes for discrete bit loading

In this paper we consider low cost discrete bit loading based on greedy power allocation (GPA) under the constraints of total transmit power budget, target BER, and maximum permissible QAM modulation order. Compared to the standard GPA, which is optimal in terms of maximising the data throughput, three suboptimal schemes are proposed, which perform GPA on subsets of subchannels only. These subsets are created by considering the minimum SNR boundaries of QAM levels for a given target BER. We demonstrate how these schemes can significantly reduce the computational complexity required for power allocation, particularly in the case of a large number of subchannels. Two of the proposed algorithms can achieve near optimal performance including a transfer of residual power between subsets at the expense of a very small extra cost. By simulations, we show that the two near optimal schemes, while greatly reducing complexity, perform best in two separate and distinct SNR regions

Discrete rate maximisation power allocation with enhanced BER

This study aims to maximise the rate over a multiple-in multiple-out (MIMO) link using incremental power and bit allocation. Two different schemes, greedy power allocation (GPA) and greedy bit allocation (GBA), are addressed and compared with the standard uniform power allocation (UPA). The design is constrained by the target bit error ratio (BER), the total power budget and fixed discrete modulation orders. The authors demonstrate through simulations that GPA outperforms GBA in terms of throughput and power conservation, whereas GBA is advantageous when a lower BER is beneficial. Once the design constraints are satisfied, remaining power is utilised in two possible ways, leading to improved performance of GPA and UPA algorithms. This redistribution is analysed for fairness in BER performance across all active subchannels using a bisection method

Suboptimal greedy power allocation schemes for discrete bit loading

In this paper we consider low cost discrete bit loading based on greedy power allocation (GPA) under the constraints of total transmit power budget, target BER, and maximum permissible QAM modulation order. Compared to the standard GPA, which is optimal in terms of maximising the data throughput, three suboptimal schemes are proposed, which perform GPA on subsets of subchannels only. These subsets are created by considering the minimum SNR boundaries of QAM levels for a given target BER. We demonstrate how these schemes can significantly reduce the computational complexity required for power allocation, particularly in the case of a large number of subchannels. Two of the proposed algorithms can achieve near optimal performance including a transfer of residual power between subsets at the expense of a very small extra cost. By simulations, we show that the two near optimal schemes, while greatly reducing complexity, perform best in two separate and distinct SNR regions